In manufacturing of a memory cell of a memory device, two N-type semiconductor sections serving as a source and a drain are formed to sandwich a P-type semiconductor layer on a silicon substrate. A polysilicon floating gate placed between oxide layers is formed over the P-type semiconductor layer, and a control gate is further formed over the floating gate. Therefore, an electric charge (electrons) accumulated on the floating gate of the memory cell is held by the oxide layers that cover the floating gate, and data can be held for a long time without supply of a power source.
Writing of data to the memory cell is performed by injecting electrons to the floating gate by a quantum tunneling effect through the oxide layers. The n-type semiconductors as circuit substrates are set as a ground potential, and a write voltage is applied to the control gate by a tiny amount of electric current. The electrons accumulated in the floating gate store information. In a multivalued memory, information of a plurality of bits is stored based on an amount of electric charge accumulated on the floating gate.
In reading of information of data from the memory cell, a read voltage is applied between the source and the drain. A gate voltage that starts a flow of a current between the source and the drain, i.e. a threshold voltage varies depending on the number of electrons (amount of electric charge) in the floating gate. A plurality of predetermined read voltages are sequentially applied to the gate of the memory cell to check whether the threshold voltage corresponding to the information stored in the memory cell exceeds the read voltages.
In the flash memory cell, electrons penetrate through an oxide film as an insulator in each writing or reading. Therefore, an increase in the number of writings and the number of readings degrades the oxide film.
In recent years, a size of the memory cell is reduced due to increased memory density of the memory device, and the amount of electric charge accumulated on the floating gate is reduced. Therefore, influence of interference noise between adjacent cells is relatively increasing. More specifically, writing (program) or reading of data to and from the memory cell may change data of an adjacent memory cell.
For example, data is written to a memory cell selected by a word line and a bit line. However, non-selected cells also enter a weak writing state, and a program disturb (hereinafter, called “PD”) phenomenon occurs, in which the threshold voltage increases. The non-selected memory cells also enter the weak writing state in the reading of data, and a read disturb (hereinafter, called “RD”) phenomenon occurs, in which the threshold voltage increases.
On the other hand, when the data written to the memory cell is not accessed for a long time, the electrons are gradually discharged from the floating gate of the memory cell, and a data retention (hereinafter, called “DR”) phenomenon occurs, in which the threshold voltage is reduced.
To prevent an occurrence of a data read error caused by the RD, DR, or the like to improve reliability of the memory device, for example, changing a read level (voltage) is effective.